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HD74LS156
Dual 2-line-to-4-line Decoders / Demultiplexers (with open collector outputs)
REJ03D0441-0300 Rev.3.00 Jul.13.2005 This circuit features dual 1-line-to-4-line demultiprexer with individual strobes and common binary-address input. When both sections are enabled by the strobes, the common binary-address inputs sequentially select and route associated input data to the appropriate output of each section. The individual strobes permit activating or inhibiting each of the 4-bit sections as desired. Data applied to input 1C is inverted through its outputs. The inverter following the 1C data input permits use as a 3-to-8-line decoder or 1-to-8-line demultiplexer without external gating.
Features
* Ordering Information
Part Name HD74LS156P HD74LS156RPEL Package Type DILP-16 pin SOP-16 pin (JEDEC) Package Code (Previous Code) PRDP0016AE-B (DP-16FV) PRSP0016DG-A (FP-16DNV) Package Abbreviation P FP Taping Abbreviation (Quantity) -- EL (2,500 pcs/reel)
Note: Please consult the sales office for the above package availability.
Pin Arrangement
Data 1C Strobe 1G Select Input B 1Y3 1Y2 Outputs 1Y1 1Y0 GND
1 2 3 4 5 6 7 8
1Y3 1G 1C 1Y2 1Y1 1Y0 B B A A 2G 2Y3 2C B B A A 2Y2 2Y1 2Y0
16 15 14 13 12 11 10 9
VCC Data 2C Strobe 2G Select Input A 2Y3 2Y2 Outputs 2Y1 2Y0
(Top view)
Rev.3.00, Jul.13.2005, page 1 of 6
HD74LS156
Function Table
* 2-to-4-line Decoder / 1-to-4-line Demultiplexer
Inputs Select B X L L H H X A X L H L H X Inputs Select B X L L H H X A X L H L H X Strobe 2G H L L L L X Data 2C X L L L L H 2Y0 H L H H H H 2Y1 H H L H H H Strobe 1G H L L L L X Data 1C X H H H H L 1Y0 H L H H H H 1Y1 H H L H H H Outputs 2Y2 H H H L H H 2Y3 H H H H L H Outputs 1Y2 H H H L H H 1Y3 H H H H L H
* 3-to-8-line Decoder / 1-to-8-line Demultiplexer
Inputs Strobe or Select (0) Data C*1 B A G*2 2Y0 X X X H H L L L L L L L H L H L H L L H L H H L H H L L L H H L H L H H H L L H H H H L H Notes: 1. C; input 1C and 2C connected together 2. G; inputs 1G and 2G connected together 3. H; high level, L; low level, X; irrelevant (1) 2Y1 H H L H H H H H H (2) 2Y2 H H H L H H H H H Outputs (3) 2Y3 H H H H L H H H H (4) 1Y0 H H H H H L H H H (5) 1Y1 H H H H H H L H H (6) 1Y2 H H H H H H H L H (7) 1Y3 H H H H H H H H L
Rev.3.00, Jul.13.2005, page 2 of 6
HD74LS156
Block Diagram
Strobe 1G Data 1C Select B 1Y0 1Y1 1Y2 1Y3 Outputs 2Y0 Select A Data 2C Strobe 2G 2Y1 2Y2 2Y3
Absolute Maximum Ratings
Item Supply voltage Input voltage Power dissipation Storage temperature Symbol VCC VIN PT Tstg Ratings 7 7 400 -65 to +150 Unit V V mW C
Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.
Recommended Operating Conditions
Item Supply voltage High level output voltage Low level output current Operating temperature Symbol VCC VOH IOL Topr Min 4.75 -- -- -20 Typ 5.00 -- -- 25 Max 5.25 5.5 8 75 Unit V V mA C
Electrical Characteristics
(Ta = -20 to +75 C)
Item Input voltage Output current Output voltage Symbol VIH VIL IOH VOL IIH IIL II min. 2.0 -- -- -- -- -- -- -- -- -- typ.* -- -- -- -- -- -- -- -- 6.1 -- max. -- 0.8 100 0.4 0.5 20 -0.4 0.1 10 -1.5 Unit V V A V A mA mA mA V Condition
VCC = 4.75 V, VIH = 2 V, VIL = 0.8 V, VOH = 5.5V IOL = 4 mA VCC = 4.75 V, VIH = 2 V, VIL = 0.8 V IOL = 8 mA VCC = 5.25 V, VI = 2.7 V VCC = 5.25 V, VI = 0.4 V VCC = 5.25 V, VI = 7 V VCC = 5.25 V VCC = 4.75 V, IIN = -18 mA
Input current
Supply current** ICC Input clamp voltage VIK Notes: * VCC = 5 V, Ta = 25C ** ICC is measured with outputs open, A, B, and 1C inputs at 4.5 V, and 2C, 1G, and 2G inputs grounded.
Rev.3.00, Jul.13.2005, page 3 of 6
HD74LS156
Switching Characteristics
(VCC = 5 V, Ta = 25C)
Item Symbol tPLH tPHL tPLH tPHL tPLH tPHL Inputs A, B, 2C, 1G or 2G A, B, 2C, 1G or 2G A or B A or B 1C 1C Output Y Y Y Y Y Y Level of logic 2 2 3 3 3 3 min. -- -- -- -- -- -- typ. 25 34 31 34 32 32 max. 40 51 46 51 48 48 ns Unit Condition
Propagation delay time
CL = 15 pF, RL = 2 k
Testing Method
Test Circuit
VCC
4.5V 1Y0 Input P.G. Zout = 50 RL 1G 1C B A 2C 2G 1Y1 1Y2 1Y3 2Y0 2Y1 2Y2 2Y3 CL Output
Note:
CL includes probe and jig capacitance.
Rev.3.00, Jul.13.2005, page 4 of 6
See Testing Table
HD74LS156 Waveform
tTLH 90% 1.3 V 10% tPLH tTHL 90% 1.3 V 10% tPHL VOH In phase output tPHL 1.3 V tPLH VOH Out of phase output 1.3 V 1.3 V VOL 1.3 V VOL 3V 0V
Input
Note:
Input pulse; tTLH 15 ns, tTHL 6 ns, PRR = 1 MHz, duty cycle 50%
Rev.3.00, Jul.13.2005, page 5 of 6
HD74LS156
Package Dimensions
JEITA Package Code P-DIP16-6.3x19.2-2.54 RENESAS Code PRDP0016AE-B Previous Code DP-16FV MASS[Typ.] 1.05g
D
16
9
1 0.89 b3
8
Z
E
A1
A
Reference Symbol
Dimension in Millimeters Min Nom 7.62 19.2 6.3 20.32 7.4 5.06 0.51 0.40 0.48 1.30 0.19 0 2.29 2.54 0.25 0.31 15 2.79 1.12 2.54 0.56 Max
e D E
L
1
A A1
e
bp
e1
b c b c
p 3
e Z ( Ni/Pd/Au plating ) L
JEITA Package Code P-SOP16-3.95x9.9-1.27
RENESAS Code PRSP0016DG-A
Previous Code FP-16DNV
MASS[Typ.] 0.15g
*1
D 9
F
16
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
bp
Index mark
*2
E
HE
c
Reference Symbol
Dimension in Millimeters Min Nom 9.90 3.95 Max 10.30
Terminal cross section ( Ni/Pd/Au plating )
1 Z e
*3
D E A2
8 bp x M L1
A1 A bp b1 c c
1
0.10
0.14
0.25 1.75
0.34
0.40
0.46
0.15
0.20
0.25
HE
0 5.80 6.10 1.27
8 6.20
A
A1
L y
e x y
0.25 0.15 0.635 0.40
1
Detail F
Z L L 0.60 1.08
1.27
Rev.3.00, Jul.13.2005, page 6 of 6
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